The DSTREAM^™ high-performance debug and trace unit enables software debug and optimization on any ARM processor-based hardware target. DSTREAM extends the functionality of RVI and RVT2 with faster memory download and trace capture, as well as wider support for physical debug and trace interfaces.

DSTREAM enables the connection of DS-5 Debugger, RVD and third party debuggers to ARM-based devices via JTAG or Serial-Wire Debug. DSTREAM uses FPGA acceleration to deliver high download speeds and fast stepping through code on single and multi-processor devices

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RealView ICE (RVI) and RealView Trace 2 (RVT2) are ARM's legacy target connection units. While RVI provide run-control debug functionality for both DS-5 and RVDS users, RVT2 adds trace capabilities to RVI for RVDS users only.

 

Alternatively, DS-5 and RVDS users can benefit from a faster, flexible and cost-effective solution for debug and trace with the next generation target connection, DSTREAM.

 

RVI™ run-control debug unit

RVI enables the connection of ARM and third party debuggers to ARM processor-based devices via JTAG or Serial-Wire Debug. RVI uses FPGA acceleration to deliver high download speeds and fast stepping through code on single and multi-processor devices.

With features such as Virtual Ethernet for mounting of remote files systems without additional drivers or I/O ports, accelerated hardware bring-up for many development platforms, and open debug interface for use with third-party tools, RVI is a comprehensive solution for development and debug of complex SoCs.

 

RVT2™ trace capture unit

RVT2 is a trace capture hardware unit that works as an extension to RVI. RVT2 connects to the trace port of a hardware target to extract trace data off-chip, either storing it onto its 24MB buffer or streaming it to a host computer.

Trace is an essential tool for the resolution of complex software/hardware and timing-related issues, as it enables post-analysis of a software execution without the need for any software or hardware instrumentation. In addition, the innovative data streaming capability in RVT2, together with the ARM Profiler also enables non-intrusive, long term software profiling.

 

RVI and RVT2 ship with powerful software utilities to assist with SoC bring-up and hardware validation. They also provide interfaces for third party and custom tools.

VSTREAM is a fast and flexible virtual debug interface that connects software debuggers to hardware assisted verification systems such as Cadence Palladium, Eve ZeBu and MentorVeloce and RTL simulators like Cadence Incisive, Mentor ModelSim & Questa and SynopsysVCS.  

 

VSTREAM enables the stop-mode debug features usually available in professional debug adaptors including stopping the processor, view and change the value of processor registers and system memory and single-step through code. However, this is not done via a physical JTAG connection, but via SCE-MI2 or ZEMI-3 transactors directly into the SoC RTL. Not only this virtual connection is much faster, but it is also easier to start remotely, not requiring any modification to the emulator hardware set-up.

It helps to verify the correct implementation of the debug and trace fabric of the SoC, including any CoreSight components, by running high-level test patterns and connecting an actual debugger to the RTL simulator. The connection of the processor to the memory system and memory-mapped peripherals can be easily validated by opening memory views in the debugger.

VSTREAM supports post-process PTM™ and ETM™ instruction trace after a simulation run in order to get a history of instructions executed by the processor in a non-intrusive way.